Why A tri-state output has the usual logic low (0) and logic high (1) drive states plus a third condition in which the output transistors are all turned off, presenting a high impedance that effectively disconnects the pin from the line. That lets many devices share a common bus: only the one device whose output-enable is asserted drives the bus while the rest float in high-Z. The third 'state' is an electrical condition, not an extra logic level.
Watch out The ternary math choice misreads 'tri-state' as a three-valued number system, and the impedance matching answer confuses a digital enable function with analog load matching; bus drivers do not tune themselves to the load.
Three states = 0, 1, and off (high-Z). The third one is 'disconnected', not a third logic level.