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E7A

PRACTICAL CIRCUITS

Digital circuits: digital circuit principles and logic circuits; classes of logic elements; positive and negative logic; frequency dividers; truth tables

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E7A011 of 11

Which circuit is bistable?

Why "Bistable" means the circuit has two stable output states and will stay in either one until an input tells it to change. A flip-flop does exactly that: it latches a 0 or a 1 and holds it, which is why flip-flops are the basic one-bit memory element and the building block of counters and frequency dividers. Gates, by contrast, have no memory; their output is determined moment by moment by the present inputs.
Watch out AND and OR gates are combinational logic, so their outputs follow the inputs instantly with nothing stored, and a bipolar amplifier is an analog device whose output varies continuously rather than resting in two discrete states.
Bi-stable = two stable states = flip and flop. Flip-flops remember, gates just react.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A022 of 11

What is the function of a decade counter?

Why A decade counter is a divide-by-10 frequency divider: it counts input pulses from 0 through 9 and then rolls over, generating one carry/output pulse for every ten pulses at its input. "Decade" means ten, so the output frequency is the input frequency divided by 10. Cascading decade counters gives divide-by-100, divide-by-1000, and so on, which is how frequency counters build their decimal display chain.
Watch out The choices about driving a seven-segment display describe a BCD-to-seven-segment decoder/driver, a separate chip that often follows a decade counter; and no simple counter multiplies pulses, so producing 10 outputs per input is backwards.
Decade = 10. Counters divide, never multiply: 10 in, 1 out.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A033 of 11

Which of the following can divide the frequency of a pulse train by 2?

Why A flip-flop is a bistable element that changes state only on a clock edge. Wire it to toggle (a JK with J=K=1, or a D flip-flop with Q-not fed back to D) and the output flips once per input pulse, so it takes two input pulses to complete one full output cycle. That halves the frequency, which is why chains of flip-flops make binary counters and divide-by-2^n dividers.
Watch out XOR and OR gates are combinational: their outputs depend only on the present inputs, with no memory of past pulses, so they cannot count or divide. A multiplexer just selects one of several inputs to pass through.
Only memory divides. Flip-flop toggles once per clock, so out = in / 2; N flip-flops give divide by 2^N.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A044 of 11

How many flip-flops are required to divide a signal frequency by 16?

Why A single flip-flop configured as a toggle changes state once per input cycle transition, so its output is half the input frequency. Chaining them multiplies the division: n flip-flops give a divide ratio of 2^n. Since 2^4 = 16, four stages are needed.
Watch out Picking 16 assumes one flip-flop per count, but the division is binary and exponential, not one-to-one. Eight flip-flops would divide by 2^8 = 256.
Divide ratio = 2^n. Count the powers of 2: 2, 4, 8, 16 is four flip-flops.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A055 of 11

Which of the following circuits continuously alternates between two states without an external clock signal?

Why A multivibrator's name tells you how many stable states it has. An astable multivibrator has no stable state, so it flips back and forth on its own at a rate set by its RC time constants, making it a free-running square wave oscillator that needs no external clock. Flip-flops, by contrast, are clocked (synchronous) devices that only change state when a clock edge arrives.
Watch out The monostable multivibrator is the tempting one, but it has one stable state: an external trigger kicks it into the other state for a fixed time and it returns, which is why it is called a one-shot.
A-stable = not stable = never settles, so it oscillates. Mono-stable = one stable state = one-shot.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A066 of 11

What is a characteristic of a monostable multivibrator?

Why A monostable multivibrator, also called a one-shot, has exactly one stable state. A trigger pulse flips it into the unstable state, where it stays for a fixed period set by an RC time constant, then it falls back on its own. This makes it useful for generating a pulse of known width from an input edge of any length.
Watch out The continuous square wave describes the astable multivibrator, which has no stable state and free-runs as an oscillator, and storing one bit describes the bistable multivibrator, better known as a flip-flop.
Count the stable states: a-stable = none (oscillates), mono = one (one-shot pulse), bi = two (stores a bit).
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A077 of 11

What logical operation does a NAND gate perform?

Why NAND is AND followed by NOT, so take the AND result and invert it. An AND gate outputs 1 only when every input is 1, so the NAND inverts that single case to 0 and outputs 1 for every other input combination. That makes the low output the unique, identifying state of a NAND gate.
Watch out The choice saying the output is 1 only when all inputs are 1 describes a plain AND gate, the un-inverted version; the choice about a 0 output only when all inputs are 0 describes an OR gate.
NAND = NOT-AND: all ones in, zero out. It is the only input pattern that pulls a NAND low.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A088 of 11

What logical operation does an OR gate perform?

Why An OR gate outputs a logical high whenever at least one of its inputs is high; it only outputs 0 when every input is 0. In Boolean terms the output is A + B, where the plus sign means logical OR, not addition. Its truth table for two inputs reads 0,1,1,1 going from both inputs low to both inputs high.
Watch out The choice about producing 0 when all inputs are 1 describes a NAND gate, and the one about producing 1 when all inputs are 0 describes a NOR gate.
OR = "any one will do." Only all-zeros in gives zero out.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A099 of 11

What logical operation is performed by a two-input exclusive NOR gate?

Why An exclusive NOR is an exclusive OR followed by an inverter, so it is an equality detector: the output is 1 when the two inputs match (0,0 or 1,1) and 0 when they differ. With two inputs, "they differ" means exactly one input is 1, so that condition drives the output low.
Watch out The choice saying a 1 appears when one and only one input is 1 describes the plain exclusive OR, which is the XNOR's complement. The choices about all inputs 0 or all inputs 1 describe NOR and AND behavior.
XNOR = "same" detector: match gives 1, mismatch gives 0. The NOR in the name means invert the XOR answer.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A1010 of 11

What is a truth table?

Why A truth table is the complete input/output map of a digital logic device: every possible combination of input logic levels is listed on the left, with the resulting output state on the right. For a two-input gate that means 4 rows (2^2), for three inputs 8 rows (2^n rows for n inputs). It fully defines the gate's behavior without needing a schematic or equations.
Watch out The op-amp choices are out of place here, since op-amps are analog devices with continuously variable outputs, not discrete logic states. The choice limiting the table to only true outputs is wrong because a truth table lists both the low and high output cases.
Truth table = ALL input combinations and their outputs, digital only. 2^n rows for n inputs.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
E7A1111 of 11

What does "positive logic" mean in reference to logic devices?

Why Logic families assign voltage levels to the two binary states, and the assignment is a convention, not a law of physics. Positive logic is the common convention where the more positive (higher) voltage level stands for logic 1 or true, and the lower voltage level stands for logic 0 or false. Negative logic is the opposite convention, where the low or more negative level represents 1. TTL and standard CMOS parts are described using positive logic.
Watch out The choice about noise immunity describes a different property entirely, how much interference a family tolerates before a level is misread, which CMOS does well but which has nothing to do with the logic polarity convention.
Positive logic: higher voltage = 1. Think "high is true." Negative logic flips it.
HamSandwich explanation, first draft. The question and answers are the NCVEC text.
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